[AKD4141-A] 2007/11 - 1 - general description the akd4141 is an evaluation board for the ak4141, di gital stereo decoder with stereo sample rate converter, digital switches and sound processing functions. the akd4141 has the analog/digital audio interface and can achieve t he interface with analog/digital audio systems via bnc/rca/opt-connector. ? ordering guide AKD4141-A --- evaluation board for ak4141 (cable for connecting with printer port of ibm-at,compatible pc and control software are packed with this. this control soft ware does not support windows nt.) function ? dit/dir with optical input/output ? 10pin header for digital audio i/f and serial control i/f ? bnc connector for an external clock input opt in ak4114 10pin header dsp data 9v, 5v, 3.3v, 1.8v agnd, dgnd opt out ak4114 10pin header dsp data ak4141 coax regulator coax ak4682 sif1 sif2 lin1 rin1 lout1 rout1 lout2 rout2 ext opt out 9v ? 5v 5v ? 3.3v 3.3v ? 1.8v 10pin header serial control (codec) x?tal (dir) (dit) figure 1. akd4141 block diagram * circuit diagram and pcb layout are attached at the end of this manual evaluation board rev.2 for ak4141 a kd4141- a
[AKD4141-A] 2007/11 - 2 - evaluation board manual ? operation sequence 1) set up the power supply lines. (1-1) in case of using the regulator. [9v] (red) = +9v (for regulator and pvdd of ak4682) [tvdd] (red) = open [avdd1] (red) = open [avdd2] (red) = open [logic] (red) = open [dvdd] (red) = open [agnd] (black) = 0v (analog ground) [dgnd] (black) = 0v (digital ground) (note) tvdd, avdd1, avdd2 of ak4141 and logic is supplied ?3.3v? from regulator (t2). dvdd of ak4141 is supplie d ?1.8v? from regulator (t3). avdd1, avdd2, dvdd1 and dvdd2 of ak4682 is supplied ?5v? from regulator (t1). (1-2) in case of using the power supply connectors. [9v] (red) = +9v (for pvdd of ak4682) [tvdd] (red) = +3.3v (for tvdd of ak4682 and ak4141) [avdd1] (red) = +3.3v (for avdd of ak4141) [avdd2] (red) = +3.3 v (for avdd2 of ak4141) [logic] (red) = +3.3v (for vdd of ak4114 (dir, dit) and logic) [dvdd] (red) = +1.8v (for dvdd of ak4141) [agnd] (black) = 0v (analog ground) [dgnd] (black) = 0v (digital ground) (note) avdd1, avdd2, dvdd1 and dvdd2 of ak4682 is supplied ?5v? from regulator (t1). 2) set up the jumper pins and switches. (see the followings.) 3) power on. the ak4141, ak4682, ak4114 (dir), ak4114 (dit) should be reset once bringing toggle sw ?l? upon power-up. please refer to talble 1.on this page about setting of toggle sw. ? setting of the toggle sw sw2 pdn_ak4141 pdn sw of ak4141 (u2). keep ?h? during normal operation. sw3 pdn-codec pdn sw of ak4682 (u5). keep ?h? during normal operation. keep ?l? when ak4682 is not used. sw5 pdn-dir pdn sw of ak4114 (u7). keep ?h? during normal operation. keep ?l? when ak4114 is not used. sw7 pdn-dit pdn sw of ak4114 (u9). keep ?h? during normal operation. keep ?l? when ak4114 is not used. table 1. setting of the toggle sw
[AKD4141-A] 2007/11 - 3 - ? indication for led led1 int output of int pin of the ak4141 (u2). turns on when pll of the ak4141 (u2) is unlocked. led2 int0 output of int0 pin of the ak4114 (u7). turns on when the ak4114 (u7) is unlocked. table 2. indication for led ? setting of jumper pins no name setting 21 tvdd tvdd power supply reg: tvdd is supplied from regulator (t2). ?tvdd? connector should be open. tm: tvdd is supplied from ?tvdd? connector. 23 avdd1 avdd1 power supply reg: avdd1 is supplied from regulator (t2). ?avdd1? connector should be open. tm: avdd1 is supplied from ?avdd1? connector. 24 avdd2 avdd2 power supply reg: avdd2 is supplied from regulator (t2). ?avdd2? connector should be open. tm: avdd2 is supplied from ?avdd2? connector. 26 logic vdd (logic) power supply reg: vdd is supplied from regulator (t2). ?logic? connector should be open. tm: vdd is supplied from ?logic? connector. 22 dvdd dvdd power supply reg: dvdd is supplied from regulator (t3). ?dvdd? connector should be open. tm: dvdd is supplied from ?dvdd? connector. 25 gnd analog gnd and digital gnd open: separated. short: common. 20 m/s codec mode setting of ak4682 master: master mode. slave: slave mode. 27 txin input of ak4141?s txin opt: opt of port3 (rx). gnd: gnd. 28 rx input of ak4114 (dir)?s rx opt: opt of port3 (rx). coax: bnc of j10 (coax). 34 tx output of ak4114 (dit)?s tx1 opt: opt of port5 (tx) coax: bnc of j11 (coax) 2 ext-t termination of j2 (external clock) open: no termination. short: 51 ? . 132 mcki input of ak4141?s mcki dir: imclk. ext: external clock from j11.
[AKD4141-A] 2007/11 - 4 - 4 lrck5 input of ak4141?s lrck5 olrck: olrck. ilrck: ilrck. 5 sclk5 input of ak4141?s sclk5 obick: obick. ibick: ibick. 6 lrck4 input of ak4141?s lrck4 olrck: olrck. ilrck: ilrck. 7 sclk4 input of ak4141?s sclk4 obick: obick ibick: ibick 9 sdti5 input of ak4141?s sdti5 dir: sdto of di r (u7) adc: sdtob of ak4682 (u5). gnd: gnd. 12 sdti4 input of ak4141?s sdti4 dir: sdti of dir (u7) adc: sdtob of ak4682 (u5). gnd: gnd. 13 sdti3 input of ak4141?s sdti3 dir: sdti of dir (u7) adc: sdtob of ak4682 (u5). gnd: gnd. 15 sdti2 input of ak4141?s sdti2 dir: sdti of dir (u7) adc: sdtob of ak4682 (u5). gnd: gnd. 17 sdti1 input of ak4141?s sdti2 dir: sdti of dir (u7) adc: sdtob of ak4682 (u5). gnd: gnd. 8 sdto input of dit (u9)?s daux sdto1: output of ak4141?s sdto1 sdto2: output of ak4141?s sdto2 sdto3: output of ak4141?s sdto3 14 sdtia1 input of ak4682 (u5)?s sdtia1 sdto1: output of ak4141?s sdto1 sdto2: output of ak4141?s sdto2 sdto3: output of ak4141?s sdto3 16 sdtia2 input of ak4682 (u5)?s sdtia2 sdto1: output of ak4141?s sdto1 sdto2: output of ak4141?s sdto2 sdto3: output of ak4141?s sdto3 32 imclk imclk and dir (u7)?s mcko1 open: separated. short: connected. 31 ilrck ilrck and dir (u7)?s lrck open: separated. short: connected. 29 ibick1 ibick and dir (u7)?s bick open: separated. short: connected.
[AKD4141-A] 2007/11 - 5 - 30 sdti sdti and dir (u7)?s sdto open: separated. short: connected. 33 ibick2 polarity of ibick thr: through. inv: invert. 39 ilrck ilrck and dit (u9)?s lrck open: separated. short: connected. 38 olrck olrck and dit (u9)?s lrck open: separated. short: connected. 37 ibick ibick and dit (u9)?s bick open: separated. short: connected. 36 obick1 obick and dit (u9)?s bick open: separated. short: connected. 35 sdto sdto and dit (u9)?s daux open: separated. short: connected. 41 obick2 polarity of obick thr: through. inv: invert. table 3. setting of jumper pins
[AKD4141-A] 2007/11 - 6 - ? evaluation mode the setup sequence from the initial state the akd4141 can evaluate various mode using ak 4682 (codec), ak4114 (dir) and ak4114 (dit). set jumper pins and sw to condition to evaluate. about ak4141 and ak4682, refer to each datasheet. about dir and dit, refer to table 5.~ table 10. in this manual. follows are setting examples of ak4141?s decoder. measurement path : ? sif (j1) ak4141 (stereo decoder) dac (ak4682) lout1/rout1 ? sif (j1) ak4141 (stereo decoder) dit (ak4141) tx (port1) setting of ak4141 : using x?tal oscillator, master mode mclk=256fjs, fs=48khz. (1) setting of mclk. x?tal oscillator (x1) is used. 12.288mhz (fs=48khz, mclk=256fs) is equipped on the board by initial setting. when evaluate it in other conditions, please attach a x?tal oscillator according to evaluation mode. (2) setting of dip sw1. (2-1) setting of master mode please set msn (no.6) of dip sw1 to ?h?. (master mode : mcki=256fs) (2-2) setting of sif input. please set 6m5 pin and 4m5[2-0] pin according to carrier frequency. (2-2-1) in case of in cluding the 6.5mhz carrier. 6m5 (no.5) of dip sw1 = ?l? : l nicam. 6m5 (no.5) of dip sw1 = ?h? : d/k (2-2-2) in case of in cluding the 4.5mhz carrier. 4m5[2-0] (no.4-2) of dip sw1 = ?lhl? : eiaj. 4m5[2-0] (no.4-2) of dip sw1 = ?llh? : m-korea. 4m5[2-0] (no.4-2) of dip sw1 = ?lll? : pal (chroma carrier) 4m5[2-0] (no.4-2) of dip sw1 = ?hll? : fm-stereo radio eu 4m5[2-0] (no.4-2) of dip sw1 = ?hhh? : fm-stereo radio us (note.) the details please refer to table 4. in this manual. (3) setting of the jumper pins. jumper pins should be set as follows. please set jp14 and jp16 according to the output of ak4141. the following are setting examples of jp14=sdto1 and jp16=sdto2. (4) please set toggle sw2 (ak4141) to ?h?. (5) please write register of ak4141 with control software. the following is register setting from the initial state of ak4141. 01h : mcke bit & mckd bit ?0? ?1? (mcko output for ak4682 : mcko=256fs) (6) please supply sif signal from j1 (sif1). (7) please write register of ak4141 with control software. 41h : asd bit = ?0? ?1?. (automatic system detection on) jp20 m/s codec slave maste r jp11 sclk obic k ibick olrc k ilrck jp10 lrck jp14 sdtia1 sdto1 sdto2 sdto3 jp16 sdtia2 sdto1 sdto2 sdto3
[AKD4141-A] 2007/11 - 7 - (8) please set toggle sw3 (codec) to ?h?. (9) please write register of ak4682 with control software. the following is register setting from the initial state of ak4682. 1. 02h : difa[1-0] bit ?11? ?10? (audio interface fo rmat : left justified) (note) in case of ak4141 evaluation using ak4682, it is n ecessary to corres pond to audio in terface format for ak4141 and ak4682. audio interface format of ak4141?s initial state is left justified.
[AKD4141-A] 2007/11 - 8 - ? setting of dip sw (1). setting of sw1 (ak4141) sw1 no. name on (?h?) off (?l?) default 1 iis audio data format sel ect pin. ored with odif b it, ored with idif0 bit. ?l?: 24 bit left justified if idif0 bit = ?0? (default). ?h?: 24/16 bit iis. l 2 4m50 l 3 4m51 l 4 4m52 decoder standard preference c ontrol 0 for 4.5mhz carrier. 4m5 [2:0] pin ?lll?: pal (chroma carrier) ?llh?: m-korea ?lhl?: eiaj ?lhh?: reserved ?hll?: fm-stereo radio eu ?hlh?: fm-stereo radio eu ?hhl?: fm-stereo radio eu ?hhh?: fm-stereo radio us this pin is internally xored with 4m5[2-0] bit (default = ?011?). l 5 6m5 decoder standard preference control for 6.5mhz carrier. ?l?: secam l nicam ?h?: d/k1, d/k2, d/k3 or d/k nicam this pin is internally xored with 6m5 bit (default = ?0?). l 6 msn master mode select pin. ored with cks [1:0] bits. ?l?: slave mode if cks [2 :0] bits = ?000? (default). ?h?: master mode of mclk=256f s if cks2 bit = ?0? (default). l 7 cad0 chip address 0 pin. should match cad0 bit in iic first byte. l 8 cad1 chip address 1 pin. should match cad1 bit in iic first byte. l table 4. sw1 setting (2). setting of sw4 (dir: ak4114) sw4 no. name on (?h?) off (?l?) default 1 dif2 h 2 dif1 l 3 dif0 ak4114 output audio in terface format setting refer to table 6. l 4 cm1 l 5 cm0 ak4114 clock mode setting fixed to ?l?. l 6 ocks1 h 7 ocks0 ak4114 master clock frequency setting refer to table 7 l table 5. sw4 setting lrck bick mode dif2 pin dif1 pin dif0 pin sdto format i/o i/o 0 l l l 16bit, right justified h/l o 64fs o 1 l l h 18bit, right justified h/l o 64fs o 2 l h l 20bit, right justified h/l o 64fs o 3 l h h 24bit, right justified h/l o 64fs o 4 h l l 24bit, left justified h/l o 64fs o (default) 5 h l h 24bit, i 2 s compatible l/h o 64fs o 6 h h l 24bit, left justified h/l i 64-128fs i 7 h h h 24bit, i 2 s compatible l/h i 64-128fs i table 6. ak4114 output audi o interface format setting
[AKD4141-A] 2007/11 - 9 - mode ocks1 pin ocks0 pin mcko1 fs (max) 0 l l 256fs 96 khz 1 l h 256fs 96 khz 2 h l 512fs 48 khz (default) 3 h h 128fs 192 khz table 7. ak4114 master clock frequency setting (3). setting of sw6 (dit: ak4114) sw6 no. name on (?h?) off (?l?) default 1 dif2 h 2 dif1 l 3 dif0 ak4114 input audio interface format setting refer to table 9. l 4 cm1 ak4114 clock mode setting fixed to ?l?. l 5 cm0 ak4114 clock mode setting fixed to ?h?. h 6 ocks1 l 7 ocks0 ak4114 master clock frequency setting refer to table 10. l table 8. sw6 setting lrck bick mode dif2 pin dif1 pin dif0 pin daux format i/o i/o 0 l l l 24bit, left justified h/l o 64fs o 1 l l h 24bit, left justified h/l o 64fs o 2 l h l 24bit, left justified h/l o 64fs o 3 l h h 24bit, left justified h/l o 64fs o 4 h l l 24bit, left justified h/l o 64fs o (default) 5 h l h 24bit, i 2 s compatible l/h o 64fs o 6 h h l 24bit, left justified h/l i 64-128fs i 7 h h h 24bit, i 2 s compatible l/h i 64-128fs i table 9. ak4114 input audio interface format setting mode ocks1 pin ocks0 pin mcko1 fs (max) 0 l l 256fs 96 khz (default) 1 l h 256fs 96 khz 2 h l 512fs 48 khz 3 h h 128fs 192 khz table 10. ak4114 master clock frequency setting
[AKD4141-A] 2007/11 - 10 - ? serial control the ak4141 can be controlled via the printer port (par allel port) of ibm-at compatible pc. connect port2 (ctrl) with pc by 10 wire flat cable packed with the akd4141. port2 up i/f 6 5 10 1 nc cdto cdti ccl k csn gnd gnd gnd gnd gnd red figure 2. connect of 10 wire flat cable
[AKD4141-A] 2007/11 - 11 - control software manual ? set-up of evaluation board and control software 1. set up the AKD4141-A according to previous term. 2. connect ibm-at compatible pc with AKD4141-A by 10-line type flat cable (packed with AKD4141-A). take care of the direction of 10pin header. (please in stall the driver in the cd-rom when this control software is used on windows 2000/xp. please refer ?installation manual of control software driver by akm device control software?. in case of windows95/98/me, this inst allation is not needed. this control software does not operate on windows nt.) 3. insert the cd-rom labeled ?ak4141-a evaluation kit? into the cd-rom drive. 4. access the cd-rom drive and double-click the icon of ?akd4141.exe? and ?ak d4682 .exe? to set up the control program. 5. then please evaluate according to the follows. ? operation flow keep the following flow. 1. set up the control progra m according to explanation above. 2. click ?port reset? button. 3. click ?write default? button ? explanation of each buttons [port reset] : set up the us b interface board (akdusbif-a) . [write default] : initialize the register of ak4141. [all write] : write all register s that is currently displayed. [all read] : read all registers of the ak4141. [function1] : dialog to write data by keyboard operation. [function2] : dialog to write data by keyboard operation. [function3] : the sequence of regi ster setting can be set and executed. [function4] : the sequence that is created on [function3] can be assigned to buttons and executed. [function5]: the register setting that is created by [save] function on main window can be assigned to buttons and executed. [save] : save the current register setting. [open] : write the saved values to all register. [write] : dialog to write data by mouse operation. [read]: dialog to read data by mouse operation. ? indication of data input data is indicated on the register map. red letter indicates ?h? or ?1? and blue one indicates ?l? or ?0?. blank is the part that is not defined in the datasheet.
[AKD4141-A] 2007/11 - 12 - ? explanation of each dialog 1. [write dialog] : dialog to write data by mouse operation there are dialogs corresp onding to each register. click the [write] button corresponding to each register to set up the dialog. if you check the check box, data becomes ?h? or ?1?. if not, ?l? or ?0?. if you want to write the input data to ak4141, click [ok] button. if not, click [cancel] button. 2. [function1 dialog] : dialog to write data by keyboard operation address box: input registers address in 2 figures of hexadecimal. data box: input registers data in 2 figures of hexadecimal. if you want to write the input data to ak4141, click [ok] button. if not, click [cancel] button. 3. [function2 dialog] : dialog to evaluate vol address box: input registers address in 2 figures of hexadecimal. start data box: input starts data in 2 figures of hexadecimal. end data box: input end data in 2 figures of hexadecimal. interval box: data is written to ak4141 by this interval. step box: data changes by this step. mode select box: if you check this check box, data reaches end data, and returns to start data. [example] start data = 00, end data = 09 data flow: 00 01 02 03 04 05 06 07 08 09 09 08 07 06 05 04 03 02 01 00 if you do not check this check box, data reaches end data, but does not return to start data. [example] start data = 00, end data = 09 data flow: 00 01 02 03 04 05 06 07 08 09 if you want to write the input data to ak4141, click [ok] button. if not, click [cancel] button.
[AKD4141-A] 2007/11 - 13 - 4. [save] and [open] 4-1. [save] save the current register setting data . the extension of file name is ?akr?. (1) click [save] button. (2) set the file name and push [save] button. the extension of file name is ?akr?. 4-2. [open] the register setting data saved by [save] is writte n to ak4141. the file type is the same as [save]. (1) click [open] button. (2) select the file (*.akr) and click [open] button.
[AKD4141-A] 2007/11 - 14 - 5. [function3 dialog] the sequence of register setting can be set and executed. (1) click [f3] button. (2) set the control sequence. set the address, data and interval time. set ?-1? to the address of the step wher e the sequence should be paused. (3) click [start] button. then this sequence is executed. the sequence is paused at the step of interval="-1". click [start] button, the sequence restarts from the paused step. this sequence can be saved and opened by [save] and [open] button on the function3 window. the extension of file name is ?aks?. figure 3. window of [f3]
[AKD4141-A] 2007/11 - 15 - 6. [function4 dialog] the sequence that is created on [function3] can be assigned to buttons and executed. when [f4] button is clicked, the window as shown in figure 4. opens. figure 4. [f4] window
[AKD4141-A] 2007/11 - 16 - 6-1. [open] buttons on left side and [start] buttons (1) click [open] button and se lect the sequence file (*.aks). the sequence file name is displayed as shown in figure 5. figure 5. [f4] window (2) (2) click [start] button, then the sequence is executed. 6-2. [save] and [open] buttons on right side [save] : the sequence file names can assign be saved. the file name is *.ak4. [open] : the sequence file names assign that are saved in *.ak4 are loaded. 6-3. note (1) this function doesn't support the pause function of sequence function. (2) all files need to be in same folder us ed by [save] and [open] function on right side. (3) when the sequence is changed in [function3], the file should be loaded again in order to reflect the change.
[AKD4141-A] 2007/11 - 17 - 7. [function5 dialog] the register setting that is created by [save] function on main window can be assigned to buttons and executed. when [f5] button is clicked, the following window as shown in figure 6.opens. figure 6. [f5] window 7-1. [open] buttons on left side and [write] button ( 1) click [open] button and select the register setting file (*.akr). the register setting file name is displayed as shown in figure 7. (2) click [write] button, then the register setting is executed.
[AKD4141-A] 2007/11 - 18 - figure 7. [f5] windows(2) 7-2. [save] and [open] buttons on right side [save] : the register setting file names assign can be saved. the file name is *.ak5 . [open] : the register setting file names assign that are saved in *.ak5 are loaded. 7-3. note (1) all files need to be in same folder us ed by [save] and [open] function on right side. (2) when the register setting is changed by [save] button in main window, the file should be loaded again in order to reflect the change.
[AKD4141-A] 2007/11 - 19 - measurement results [measurement condition] ? measurement unit : audio pr ecision, system two cascade rohde & schwarz, tv test transmitter sfm ? fs : 48khz ? power supply : avdd = tvdd = 3.3v, dvdd = 1.8v ? temperature : room [measurement results] fm characteristics ( bg a2) result (lch / rch) unit s / (n+d) 0db input 63.2 / 68.4 db s / n no signal, a-weighting 69.5 / 73.4 db nicam characteristics ( bg nicam) result (lch / rch) unit s / (n+d) 0db input 67.4 / 67.3 db dynamic range -60db input, a-weighting 79.0 / 78.8 db am characteristics ( l ) result (mono) unit s / (n+d) 0db input 40.1 db s / n no signal, a-weighting 72.2 db
[AKD4141-A] 2007/11 - 20 - [plots] fm : bg a2 figure 8. fft (0db input) figure 9. fft (no signal) akm bg a2 fft (no signal) 20 20k 50 100 200 500 1k 2k 5k 10k hz -180 +0 -160 -140 -120 -100 -80 -60 -40 -20 d b r 1 akm bg a2 fft (0dbr) 20 20k 50 100 200 500 1k 2k 5k 10k hz -180 +0 -160 -140 -120 -100 -80 -60 -40 -20 d b r 1
[AKD4141-A] 2007/11 - 21 - nicam : bg nicam figure 10. fft (0db input) figure 11. fft (-60db input) akm nicam fft (-60dbr) 20 20k 50 100 200 500 1k 2k 5k 10k hz -180 +0 -160 -140 -120 -100 -80 -60 -40 -20 d b r 1 akm nicam fft (0dbr) 20 20k 50 100 200 500 1k 2k 5k 10k hz -180 +0 -160 -140 -120 -100 -80 -60 -40 -20 d b r 1
[AKD4141-A] 2007/11 - 22 - am : l figure 12. fft (0db input) figure 13. fft (no signal) akm am mono fft (no signal) 20 20k 50 100 200 500 1k 2k 5k 10k hz -180 +0 -160 -140 -120 -100 -80 -60 -40 -20 d b r 1 akm am mono fft (0dbr) 20 20k 50 100 200 500 1k 2k 5k 10k hz -180 +0 -160 -140 -120 -100 -80 -60 -40 -20 d b r 1
[AKD4141-A] 2007/11 - 23 - revision history important notice z these products and their specifications ar e subject to change without notice. when you consider any use or application of these product s, please make inquiries the sales office of asahi kasei emd corporation (akemd) or authorized distributors as to current status of the products. z akemd assumes no liability for infringement of any patent, in tellectual property, or other rights in the application or use of any information contained herein. z any export of these products, or devices or systems containing them, may require an export license or other official approval under the law and regulations of the country of export pertaining to cu stoms and tariffs, currency exchange, or strategic materials. z akemd products are neither intended nor authorized for use as critical components note1) in any safety, life support, or other hazard related device or system note2) , and akemd assumes no responsibility for such use, except for the use approved with the express written consent by re presentative director of akemd. as used here: note1) a critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of performance and reliability. note2) a hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medi cine, aerospace, nuclear energy, or other fi elds, in which its failure to function or perform may reasonably be expected to result in loss of life or in signifi cant injury or damage to person or property. z it is the responsibility of the buyer or distributor of ak emd products, who distributes, disposes of, or otherwise places the product with a third party, to notify such third party in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for and hold akemd harmless from any and all claims arising from the use of sa id product in the absence of such notification. date (yy/mm/dd) manual revision board revision reason page contents 07/05/30 km088100 0 first edition 07/06/26 km088101 1 change 24 circuit diagram was changed. c12: 0.1uf 1uf change device revision was changed. rev.a rev.b 07/11/13 km088102 change 24 circuit diagram was changed. c14: 47nf 4.7nf 2 addition 19-22 table data and plot data were added.
a a b b c c d d e e a a b b c c d d e e vdd vdd ilrck ibick olrck obick sdto ak4141-avdd2 ak4141-avdd1 vdd ak4141-dvdd ak4141-tvdd vdd vdd vdd vdd iis 4m50 4m51 4m52 6m5 msn cad0 cad1 iis 4m50 4m51 4m52 6m5 msn cad0 cad1 ilrck ibick ak4141-mcko imclk ak4682-scl ak4682-sda ak4141-txin ak4682-sdtia1 ak4682-sdtia2 sdto1 sdto2 sdto3 olrck obick sdti ak4682-sdtob sdti5 sdti4 sdti3 sdti2 sdti1 title size document number rev date: sheet of ak4141 stereo decoder 2 AKD4141-A a2 15 monday, june 18, 2007 title size document number rev date: sheet of ak4141 stereo decoder 2 AKD4141-A a2 15 monday, june 18, 2007 title size document number rev date: sheet of ak4141 stereo decoder 2 AKD4141-A a2 15 monday, june 18, 2007 h pdn-ak4141 l int 4m52 4m50 6m5 msn cad0 4m51 cad1 iis mode-ak4141 47k sda(ack) scl sda(ack) sda sif1 sif2 4141tx(opt) 12.288mhz ext ext-t ext lrck sclk olrck ilrck obick ibick agnd agnd agnd agnd agnd agnd agnd agnd agnd agnd agnd agnd agnd agnd agnd agnd dgnd dgnd dgnd dgnd dgnd dgnd sdti5 sdti4 sdti3 sdti2 sdti1 up-i/f lrck5 sclk5 lrck4 sclk4 olrck ilrck obick ibick olrck ilrck obick ibick dir dir dir dir dir adc adc adc adc adc gnd gnd gnd gnd gnd dir sdtia1 sdtia2 sdto1 sdto1 sdto2 sdto2 sdto3 sdto3 sdto1 sdto2 sdto3 sdto mcki cn1 64pin_4 cn1 64pin_4 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 r14 51 r14 51 r2 51 r2 51 r3 (open) r3 (open) jp4 hif3g-50p-2.54dsa (3x1) jp4 hif3g-50p-2.54dsa (3x1) led1 sml-210lt led1 sml-210lt 2 1 + c4 10u + c4 10u u3b 74ls07 u3b 74ls07 3 4 14 7 rp1 m9-1-473 rp1 m9-1-473 9 8 7 6 5 4 3 2 1 r20 100 r20 100 c20 0.1u c20 0.1u r27 10k r27 10k r21 10k r21 10k r16 51 r16 51 r5 51 r5 51 jp10 hif3g-50p-2.54dsa (3x1) jp10 hif3g-50p-2.54dsa (3x1) port1 totx141 port1 totx141 gnd 1 vcc 2 in 3 r9 51 r9 51 jp15 hif3g-50p-2.54dsa (3x2) jp15 hif3g-50p-2.54dsa (3x2) sw1 dss108 sw1 dss108 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 cn2 64pin_1 cn2 64pin_1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 j3 bnc-r-pc j3 bnc-r-pc r7 1k r7 1k c1 10n c1 10n jp132 hif3g-50p-2.54dsa (3x1) jp132 hif3g-50p-2.54dsa (3x1) jp17 hif3g-50p-2.54dsa (3x2) jp17 hif3g-50p-2.54dsa (3x2) jp8 hif3g-50p-2.54dsa (3x2) jp8 hif3g-50p-2.54dsa (3x2) jp16 hif3g-50p-2.54dsa (3x2) jp16 hif3g-50p-2.54dsa (3x2) c8 0.1u c8 0.1u r23 470 r23 470 r17 51 r17 51 cn3 64pin_3 cn3 64pin_3 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 r11 51 r11 51 c15 0.1u c15 0.1u r29 (short) r29 (short) c14 4.7n c14 4.7n c7 22p c7 22p jp6 hif3g-50p-2.54dsa (3x1) jp6 hif3g-50p-2.54dsa (3x1) r19 51 r19 51 port2 a1-10pa-2.54dsa port2 a1-10pa-2.54dsa 1 2 3 4 5 6 7 8 9 10 + c3 10u + c3 10u c2 10n c2 10n u1b 74ac14 u1b 74ac14 3 4 14 7 r13 51 r13 51 r15 51 r15 51 r28 470 r28 470 r10 51 r10 51 jp14 hif3g-50p-2.54dsa (3x2) jp14 hif3g-50p-2.54dsa (3x2) sw2 ate1d-2m3 sw2 ate1d-2m3 2 1 3 u1a 74ac14 u1a 74ac14 1 2 14 7 c12 1u c12 1u jp2 hif3g-50p-2.54dsa (2x1) jp2 hif3g-50p-2.54dsa (2x1) c6 22p c6 22p c9 0.1u c9 0.1u r6 51 r6 51 r18 51 r18 51 r4 51 r4 51 r26 10k r26 10k jp7 hif3g-50p-2.54dsa (3x1) jp7 hif3g-50p-2.54dsa (3x1) jp5 hif3g-50p-2.54dsa (3x1) jp5 hif3g-50p-2.54dsa (3x1) c11 0.1u c11 0.1u d1 hsu119 d1 hsu119 2 1 r25 10k r25 10k c10 0.1u c10 0.1u r8 51 r8 51 r1 (open) r1 (open) u4b 74hc14 u4b 74hc14 3 4 14 7 r12 51 r12 51 r30 51 r30 51 x1 hc-49/u x1 hc-49/u 1 2 jp11 hif3g-50p-2.54dsa (3x1) jp11 hif3g-50p-2.54dsa (3x1) c16 0.1u c16 0.1u j2 bnc-r-pc j2 bnc-r-pc u2 ak4141 u2 ak4141 filt2 1 iis 2 lrck5 3 sclk5 4 sdti5 5 lrck4 6 sclk4 7 sdti4 8 sdti3 9 sdti2 10 sdti1 11 4m50 12 4m51 13 scl 14 pdn 15 mcki 16 txin 17 dvdd 18 dvss 19 tvss 20 tvdd 21 sda 22 4m52 23 txout 24 mcko 25 sclk 26 lrck 27 sdto3 28 sdto2 29 sdto1 30 int 31 6m5 32 msn 33 cad0 34 cad1 35 filt1 36 vrefh 37 vrefl 38 avss1 39 sif2 40 vcom 41 sif1 42 avdd1 43 avss1 44 xti 45 xto 46 avss2 47 avdd2 48 c5 0.1u c5 0.1u r24 100 r24 100 c19 0.1u c19 0.1u jp9 hif3g-50p-2.54dsa (3x2) jp9 hif3g-50p-2.54dsa (3x2) jp12 hif3g-50p-2.54dsa (3x2) jp12 hif3g-50p-2.54dsa (3x2) + c17 10u + c17 10u cn4 64pin_2 cn4 64pin_2 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 j1 bnc-r-pc j1 bnc-r-pc u3a 74ls07 u3a 74ls07 1 2 14 7 r22 10k r22 10k u4a 74hc14 u4a 74hc14 1 2 14 7 + c18 10u + c18 10u c13 0.68u c13 0.68u jp13 hif3g-50p-2.54dsa (3x2) jp13 hif3g-50p-2.54dsa (3x2) -24-
a a b b c c d d e e a a b b c c d d e e ak4682-sda ak4682-scl ak4682-dvdd2 ak4682-dvdd1 ak4141-mcko ak4682-tvdd ak4682-pvdd olrck ak4682-avdd1 obick ak4682-avdd2 ak4141-mcko vdd ak4682-dvdd2 ak4682-sdtob ak4682-sdtia1 ak4682-sdtia2 title size document number rev date: sheet of ak4682 codec 2 AKD4141-A a2 25 tuesday, november 13, 2007 title size document number rev date: sheet of ak4682 codec 2 AKD4141-A a2 25 tuesday, november 13, 2007 title size document number rev date: sheet of ak4682 codec 2 AKD4141-A a2 25 tuesday, november 13, 2007 h pdn-codec l lin1 rin1 lout2 lout1 rout2 rout1 agnd agnd agnd agnd agnd agnd agnd agnd agnd agnd agnd agnd agnd agnd agnd agnd agnd agnd agnd agnd agnd agnd agnd agnd agnd dgnd m/s codec master slave r45 10k r45 10k r50 (short) r50 (short) + c41 10u + c41 10u r51 10k r51 10k + c40 10u + c40 10u jp20 hif3g-50p-2.54dsa (3x1) jp20 hif3g-50p-2.54dsa (3x1) u4d 74hc14 u4d 74hc14 9 8 14 7 sw3 ate1d-2m3 sw3 ate1d-2m3 2 1 3 + c45 4.7n + c45 4.7n c22 0.1u c22 0.1u r49 220 r49 220 c24 0.1u c24 0.1u r36 (short) r36 (short) r39 (short) r39 (short) c38 0.1u c38 0.1u c37 0.1u c37 0.1u j8 mr-552ls j8 mr-552ls 2 3 1 + c46 22u + c46 22u r37 (short) r37 (short) + c42 4.7n + c42 4.7n u5 ak4682 u5 ak4682 dvss1 1 mclkb 2 tvdd 3 lrckb 4 bickb 5 sdtob 6 pdn 7 lrcka 8 bicka 9 mclka 10 sdtia1 11 sdtia2 12 sda 13 scl 14 dvdd2 15 dvss2 16 lout1 17 rout1 18 msb 19 lout2 20 rout2 21 pvdd 22 pvss 23 lout3 24 rout3 25 avdd2 26 avss2 27 vcom36 28 vcom3 29 avss1 30 avdd1 31 lin1 32 rin1 33 nc 34 lin2 35 rin2 36 lin3 37 rin3 38 nc 39 lin4 40 rin4 41 nc 42 lin5 43 rin5 44 nc 45 lin6 46 rin6 47 dvdd1 48 c29 0.1u c29 0.1u r42 (short) r42 (short) r43 10k r43 10k c33 0.1u c33 0.1u r41 220 r41 220 j7 mr-552ls j7 mr-552ls 2 3 1 j5 mr-552ls j5 mr-552ls 2 3 1 r31 (short) r31 (short) + c23 10u + c23 10u c43 0.1u c43 0.1u + c35 22u + c35 22u + c28 2.2u + c28 2.2u u4c 74hc14 u4c 74hc14 5 6 14 7 r48 10k r48 10k r40 (short) r40 (short) + c27 10u + c27 10u + c47 4.7n + c47 4.7n c31 0.1u c31 0.1u + c30 10u + c30 10u + c34 10u + c34 10u r47 220 r47 220 r33 (short) r33 (short) r34 (short) r34 (short) j9 mr-552ls j9 mr-552ls 2 3 1 d2 hsu119 d2 hsu119 2 1 r38 (short) r38 (short) + c32 10u + c32 10u r46 10k r46 10k c26 0.1u c26 0.1u + c44 22u + c44 22u r44 220 r44 220 + c21 10u + c21 10u + c36 4.7n + c36 4.7n j4 mr-552ls j4 mr-552ls 2 3 1 r35 (short) r35 (short) + c39 22u + c39 22u + c25 2.2u + c25 2.2u j6 mr-552ls j6 mr-552ls 2 3 1 r32 (short) r32 (short) -25-
a a b b c c d d e e a a b b c c d d e e 9v 9v tvdd avdd1 dvdd logic tvdd dvdd logic avdd1 avdd2 avdd2 ak4682-pvdd ak4682-avdd1 ak4682-avdd2 ak4682-dvdd1 ak4682-dvdd2 ak4682-tvdd ak4141-dvdd ak4141-tvdd ak4141-avdd1 ak4141-avdd2 vdd vdd vdd vdd vdd vdd title size document number rev date: sheet of power supply 2 AKD4141-A a3 35 monday, june 18, 2007 title size document number rev date: sheet of power supply 2 AKD4141-A a3 35 monday, june 18, 2007 title size document number rev date: sheet of power supply 2 AKD4141-A a3 35 monday, june 18, 2007 agnd agnd agnd agnd agnd agnd agnd agnd agnd agnd agnd agnd agnd agnd agnd agnd dgnd dgnd agnd agnd agnd dgnd reg reg tm tm tm tvdd dvdd logic gnd reg tm avdd1 agnd reg tm avdd2 agnd 9v-->5v 5v-->3.3v 3.3v-->1.8v for 74ls07 for 74hc14 for 74ac14 (rx) dgnd for 74ac14 (tx) for 74hc14 dgnd dgnd dgnd dgnd dgnd reg c107 0.1u c107 0.1u u8e 74ac14 u8e 74ac14 11 10 14 7 jp24 (3x1) jp24 (3x1) + c51 47u + c51 47u u1c 74ac14 u1c 74ac14 5 6 14 7 c104 0.1u c104 0.1u logic t-45(r) logic t-45(r) 1 jp21 (3x1) jp21 (3x1) l1 (short) l1 (short) u1f 74ac14 u1f 74ac14 13 12 14 7 jp22 (3x1) jp22 (3x1) + c48 47u + c48 47u r52 (short) r52 (short) l5 (short) l5 (short) u3d 74ls07 u3d 74ls07 9 8 14 7 jp26 (3x1) jp26 (3x1) + c52 47u + c52 47u jp23 (3x1) jp23 (3x1) u3f 74ls07 u3f 74ls07 13 12 14 7 9v t-45(r) 9v t-45(r) 1 l2 (short) l2 (short) r54 (short) r54 (short) l6 (short) l6 (short) avdd2 t-45(r) avdd2 t-45(r) 1 u8f 74ac14 u8f 74ac14 13 12 14 7 r59 (short) r59 (short) c50 0.1u c50 0.1u u1d 74ac14 u1d 74ac14 9 8 14 7 r60 (short) r60 (short) t2 ta48m033f t2 ta48m033f in 1 out 2 gnd 3 l3 (short) l3 (short) u8d 74ac14 u8d 74ac14 9 8 14 7 + c59 47u + c59 47u l4 (short) l4 (short) + c55 47u + c55 47u + c67 47u + c67 47u t1 njm78m05fa t1 njm78m05fa out 3 gnd 2 in 1 dgnd t-45(bk) dgnd t-45(bk) 1 tvdd t-45(r) tvdd t-45(r) 1 + c68 47u + c68 47u + c56 47u + c56 47u c54 0.1u c54 0.1u u4e 74hc14 u4e 74hc14 11 10 14 7 + c60 47u + c60 47u c58 0.1u c58 0.1u r56 (short) r56 (short) r141 (short) r141 (short) + c61 47u + c61 47u u1e 74ac14 u1e 74ac14 11 10 14 7 u3c 74ls07 u3c 74ls07 5 6 14 7 u4f 74hc14 u4f 74hc14 13 12 14 7 u3e 74ls07 u3e 74ls07 11 10 14 7 jp25 (2x1) jp25 (2x1) t3 lt1963aest-1.8 t3 lt1963aest-1.8 in 1 gnd 2 out 3 + c62 47u + c62 47u avdd1 t-45(r) avdd1 t-45(r) 1 c53 0.1u c53 0.1u c49 0.1u c49 0.1u c110 0.1u c110 0.1u u6e 74hc14 u6e 74hc14 11 10 14 7 c57 0.1u c57 0.1u c109 0.1u c109 0.1u r58 (short) r58 (short) r57 (short) r57 (short) r53 (short) r53 (short) r55 (short) r55 (short) u6f 74hc14 u6f 74hc14 13 12 14 7 c108 0.1u c108 0.1u dvdd t-45(r) dvdd t-45(r) 1 agnd t-45(bk) agnd t-45(bk) 1 -26-
a a b b c c d d e e a a b b c c d d e e vdd vdd vdd vdd vdd vdd imclk ibick ilrck sdti vdd vdd ak4141-txin sdti1 sdti2 sdti3 sdti4 sdti5 title size document number rev date: sheet of s/pdif input 2 AKD4141-A a2 45 monday, june 18, 2007 title size document number rev date: sheet of s/pdif input 2 AKD4141-A a2 45 monday, june 18, 2007 title size document number rev date: sheet of s/pdif input 2 AKD4141-A a2 45 monday, june 18, 2007 coax opt rx(opt) ibick1 sdti ilrck rx rx(coax) int0 imclk ilrck imclk ibick sdti h pdn-dir l dif2 dif1 dif0 input-ak4114 ocks1 ocks0 cm1 cm0 47k input ibick2 thr inv gnd opt txin sdti5 sdti4 sdti3 sdti2 sdti1 dgnd dgnd dgnd dgnd dgnd dgnd dgnd dgnd dgnd dgnd dgnd dgnd dgnd dgnd dgnd r68 10k r68 10k sw5 ate1d-2m3 sw5 ate1d-2m3 2 1 3 u8a 74ac14 u8a 74ac14 1 2 14 7 + c77 10u + c77 10u jp33 hif3g-50p-2.54dsa (3x1) jp33 hif3g-50p-2.54dsa (3x1) u6b 74hc14 u6b 74hc14 3 4 14 7 jp29 hif3g-50p-2.54dsa (2x1) jp29 hif3g-50p-2.54dsa (2x1) rp2 m8-1-473 rp2 m8-1-473 8 7 6 5 4 3 2 1 r71 51 r71 51 r75 (open) r75 (open) port3 torx141 port3 torx141 out 1 vcc 3 gnd 2 c72 0.1u c72 0.1u port4 a1-10pa-2.54dsa port4 a1-10pa-2.54dsa 1 3 5 7 9 10 8 6 4 2 c74 0.1u c74 0.1u j10 bnc-r-pc j10 bnc-r-pc r69 51 r69 51 r62 470 r62 470 r64 470 r64 470 + c73 0.47u + c73 0.47u c76 0.1u c76 0.1u r73 (open) r73 (open) jp30 hif3g-50p-2.54dsa (2x1) jp30 hif3g-50p-2.54dsa (2x1) jp28 hif3g-50p-2.54dsa (3x1) jp28 hif3g-50p-2.54dsa (3x1) r74 (open) r74 (open) c70 0.1u c70 0.1u jp27 hif3g-50p-2.54dsa (3x1) jp27 hif3g-50p-2.54dsa (3x1) c69 0.1u c69 0.1u r65 75 r65 75 + c78 10u + c78 10u d3 hsu119 d3 hsu119 2 1 r63 (open) r63 (open) r72 51 r72 51 jp31 hif3g-50p-2.54dsa (2x1) jp31 hif3g-50p-2.54dsa (2x1) r76 (open) r76 (open) led2 sml-210lt led2 sml-210lt 2 1 u7 ak4114 u7 ak4114 ips0 1 nc 2 dif0 3 test2 4 dif1 5 nc 6 dif2 7 ips1 8 p/sn 9 xtl0 10 xtl1 11 tvdd 13 dvss 14 tx0 15 tx1 16 bout 17 cout 18 uout 19 vout 20 dvdd 21 dvss 22 mcko1 23 bick 26 mcko2 27 daux 28 xto 29 xti 30 pdn 31 cm0 32 cm1 33 ocks1 34 ocks0 35 int0 36 avdd 38 r 39 vcom 40 avss 41 rx0 42 nc 43 rx1 44 test1 45 rx2 46 nc 47 rx3 48 vin 12 lrck 24 sdto 25 int1 37 sw4 dss107 sw4 dss107 1 2 3 4 5 6 7 14 13 12 11 10 9 8 u8b 74ac14 u8b 74ac14 3 4 14 7 r66 18k r66 18k jp32 hif3g-50p-2.54dsa (2x1) jp32 hif3g-50p-2.54dsa (2x1) + c71 10u + c71 10u u6a 74hc14 u6a 74hc14 1 2 14 7 l7 47u l7 47u r67 1k r67 1k r70 51 r70 51 c75 0.1u c75 0.1u -27-
a a b b c c d d e e a a b b c c d d e e vdd sdto obick olrck vdd vdd vdd vdd vdd vdd ibick ilrck ak4141-mcko sdto1 sdto2 sdto3 ak4141-mcko title size document number rev date: sheet of s/pdif output 2 AKD4141-A a2 55 tuesday, november 13, 2007 title size document number rev date: sheet of s/pdif output 2 AKD4141-A a2 55 tuesday, november 13, 2007 title size document number rev date: sheet of s/pdif output 2 AKD4141-A a2 55 tuesday, november 13, 2007 obick1 olrck sdto olrck obick mcko sdto tx(opt) opt coax tx tx(coax) 1:1 dif2 dif1 dif0 ocks1 ocks0 cm1 cm0 output-ak4114 47k output obick2 thr inv h pdn-dit l sdto1 sdto3 sdto2 dgnd dgnd dgnd dgnd dgnd dgnd dgnd dgnd dgnd dgnd dgnd ibick ilrck c82 0.1u c82 0.1u jp39 hif3g-50p-2.54dsa (2x1) jp39 hif3g-50p-2.54dsa (2x1) rp3 m8-1-473 rp3 m8-1-473 8 7 6 5 4 3 2 1 + c88 10u + c88 10u jp36 hif3g-50p-2.54dsa (2x1) jp36 hif3g-50p-2.54dsa (2x1) r84 51 r84 51 r81 51 r81 51 + c81 10u + c81 10u u6c 74hc14 u6c 74hc14 5 6 14 7 r82 51 r82 51 r87 (open) r87 (open) port5 totx141 port5 totx141 gnd 1 vcc 2 in 3 c79 0.1u c79 0.1u + c83 0.47u + c83 0.47u c85 0.1u c85 0.1u port6 a1-10pa-2.54dsa port6 a1-10pa-2.54dsa 1 3 5 7 9 10 8 6 4 2 jp35 jp35 r80 10k r80 10k r83 51 r83 51 r79 0 r79 0 r78 150 r78 150 c86 0.1u c86 0.1u d4 hsu119 d4 hsu119 2 1 r86 (open) r86 (open) c84 0.1u c84 0.1u r85 (open) r85 (open) t4 da-02f t4 da-02f sw6 dss107 sw6 dss107 1 2 3 4 5 6 7 14 13 12 11 10 9 8 r77 240 r77 240 u9 ak4114 u9 ak4114 ips0 1 nc 2 dif0 3 test2 4 dif1 5 nc 6 dif2 7 ips1 8 p/sn 9 xtl0 10 xtl1 11 tvdd 13 dvss 14 tx0 15 tx1 16 bout 17 cout 18 uout 19 vout 20 dvdd 21 dvss 22 mcko1 23 bick 26 mcko2 27 daux 28 xto 29 xti 30 pdn 31 cm0 32 cm1 33 ocks1 34 ocks0 35 int0 36 avdd 38 r 39 vcom 40 avss 41 rx0 42 nc 43 rx1 44 test1 45 rx2 46 nc 47 rx3 48 vin 12 lrck 24 sdto 25 int1 37 jp38 hif3g-50p-2.54dsa (2x1) jp38 hif3g-50p-2.54dsa (2x1) jp41 hif3g-50p-2.54dsa (3x1) jp41 hif3g-50p-2.54dsa (3x1) jp37 hif3g-50p-2.54dsa (2x1) jp37 hif3g-50p-2.54dsa (2x1) c80 0.1u c80 0.1u jp34 hif3g-50p-2.54dsa (3x1) jp34 hif3g-50p-2.54dsa (3x1) + c87 10u + c87 10u u6d 74hc14 u6d 74hc14 9 8 14 7 sw7 ate1d-2m3 sw7 ate1d-2m3 2 1 3 j11 bnc-r-pc j11 bnc-r-pc u8c 74ac14 u8c 74ac14 5 6 14 7 -28-
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